The demand for increased mobility in consumer electronics is pressuring manufacturers to scale electronic technologies (e.g., semiconductor devices) to ever smaller dimensions. At the same time, the demand for increased functionality, speed, noise elimination, etc., is forcing manufactures to increase the number of passive components (e.g., capacitors and resistors) used by consumer electronic devices. Passive component integration has traditionally been accomplished by mounting them onto package and/or printed circuit board (PCB) substrate surfaces. Restricting the location of the passive components to the substrate's surface however can limit the passive components' operational capabilities (due to their inherent distance from the semiconductor device) and the substrate's scalability.
One way manufacturers are attempting to address this is by embedding the passive components in the substrate, a technique referred to as embedded passive technology. This frees up surface real estate and facilitates substrate miniaturization. Speed and signal integrity also improves because embedded components provide a more direct path through which the IC signals propagate.
One particular area of interest with respect to embedded passive technology has been the incorporation of TFC's into organic packaging (e.g., bismaleimide triazine resin, etc.) substrates. It is desirable to provide decoupling capacitance in a close proximity to an integrated circuit chip or die. The need for such capacitance increases as the switching speed and current requirements of chips or dies becomes higher. Among the various materials being considered for use as capacitor dielectrics are high-k ceramic materials. However, high-k ceramic materials can require processing at high temperatures (e.g., furnace annealing at 600-800 degrees Celsius) in order to achieve their high dielectric constant properties. At these temperatures, organic packaging substrates can melt.
One technique for addressing this involves mounting a pre-fabricated TFC laminate that has already been annealed onto the organic substrate. Such TFC laminates may include a high-k dielectric material superimposed between two conductive films which will serve, respectively, as the top and bottom electrode structures of the TFC laminate. Typically, the bottom of the conductive films has already been patterned according to the pattern of the bottom electrode structure. Such a laminate is, according to the prior art, mounted onto a microelectronic substrate which may include polymer build-up layers and conductive build-up layers, the conductive build-up layers connecting with additional underlying conductive structures. After mounting of the TFC laminate, the top conductive film may be patterned to form the upper electrode. Then, via openings are formed through the high-k ceramic material, the polymer build-up layers, and, in some cases, portions of the lower electrode structures.
In some instances, the high-k dielectric film may be pre-patterned as part of the pre-fabricated TFC laminate before the laminate is mounted onto a microelectronic substrate. Pre-patterning of the high-k film is typically performed in order to take away high-k material from the path of the vias to be provided in the TFC laminate. One prior art method of pre-patterning the high-k dielectric material includes spray-coating a high-k dielectric material, such as, for example, barium strontium titanate or BST onto a nickel substrate, which substrate will, typically after mounting onto a substrate, be patterned to serve as the TFC top electrode. The BST film is then sintered and, after sintering, patterned using either an etch process or drilling.
The spray coating process mentioned above disadvantageously poses challenges in producing a uniform high-k firm over the nickel layer. Moreover, drilling or etching a high-k ceramic film as proposed by the prior art can take a long time, reducing manufacturing through-put. In addition, patterning using the etch process or drilling can introduce damage to the high-k dielectric layer and thereby impact the functionality of the resulting TFC.
For simplicity and clarity of illustration, elements in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Where considered appropriate, reference numerals have been repeated among the drawings to indicate corresponding or analogous elements.